The Race for Microprocessor Leadership in Silicon Valley: Jan 7, 2012 IEEE Life Member Meeting in Mt View, CA


The microprocessor changed what is now known as Silicon Valley from a mostly agricultural and defense electronics region into a center of innovation for many new technologies. How did that happen and what challenges were faced along the way?

The Jan 7, 2013 IEEE Life Member panel discussed the development of microprocessor technologies in the 70?s, 80?s and 90?s.  The evolution of RISC (reduced instruction set computing) architectures and the battle for dominance in the commercial market place with conventional CPU architectures (CISC). The technological developments that lead to the creation of RISC architectures and the reaction of CISC suppliers (e.g. Intel) to address this competitive threat was debated. The panel members also shared their views on the factors that lead up to the microprocessor architectural wars and the impact microprocessor companies had in shaping Silicon Valley.

This panel session was expertly moderated by CHM CEO and President John Hollar, who provided a brief introduction to the mission and accomplishments of the CHM, which is summarized in a blog post on this website.

The panel members and their former company affiliations:

*Anant Agrawal – SPARC chip designer at Sun Micro
*John Mashey- Software architect at MIPS
*Dave House- Marketing Director & later GM of Intel’s Microprocessor Division

Event Summary

Through John Hollar’s skilled moderation, the panelists revealed a lot of hitherto undisclosed information about microprocessor activities at Intel, Sun Micro and MIPS. The audience was thrilled to hear that information from primary sources who were directly involved in the mid 1980s competitive race between general purpose (CISC*) and reduced instruction set (RISC) microprocessors.

John’s opening remarks about CHM progress has been previously published as a blog entry on this website.

* General purpose processor architecture is often referred to as Complex Instruction Set Computing, even though there are very few complex instructions. The term CISC is therefore somewhat of a misnomer. It was used to differentiate classical processor acrchitecture from Reduced Instruction Set Computing (RISC), where fewer instructions are available to be executed by the CPU.


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